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 DATA SHEET
MOS INTEGRATED CIRCUIT
PD9903
PD9903 ANALOG SUBSCRIBER LINE LSI (DIGITAL CODEC)
The PD9903 is a digital CODEC that can be used in analog subscriber circuits such as private branch exchangers (PBXs) and switching equipment for central offices. It features three of the functions required for analog subscriber circuits: 2W/4W conversion, CODEC supervision, and subscriber line supervision. Use of the PD9903 in combination with a BS-SLIC (PC7073) can reduce the number of components required in analog subscriber circuits.
FEATURES
* Single-chip monolithic LSI (CMOS) * PCM CODEC oversampling-type A/D and D/A converters * Programmable functions
* Termination impedance * Hybrid balance network * Feed resistance * Feed current * PAD control * A-law and -law * Digital gain set function * Ring-Trip function * Single power supply (+5 V) * Low power consumption during standby mode: 20 mW (TYP.)
ORDERING INFORMATION
Part Number Package 48-pin plastic shrink SOP (375 mil)
PD9903GT
The information in this document is subject to change without notice. Document No. S10897EJ3V0DS00 (3rd edition) Date Published June 1997 N Printed in Japan
The mark
shows major revised points.
(c)
1996
PD9903
PIN CONFIGURATION (Top View)
48-pin plastic shrink SOP (375 mil)
NC NC NC NC NC NC NC NC NC NC AVDD DVDD1 DVDD2 AUX/MODE BSY SUS RST EXS EXD HWR DCLK FS HWX TYPE
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
DCIN3 DCIN2 DCIN1 DCOUT1 DCOUT2 BBIN ASCN AGDT AIN AOUT ACOMOUT ACOMIN AGND SUB DGND1 DGND2 PD ALM BCUT RC1 RC2 RC3 RTIN0 RTIN1
PD9903GT
ACOMIN ACOMOUT AGDT AGND AIN ALM AOUT ASCN AUX/MODE AVDD BBIN BCUT BSY DCIN1 - DCIN3 DCLK
: ANALOG COMMON VOLTAGE IN : ANALOG COMMON VOLTAGE OUT : ANALOG GROUND DETECTION SIGNAL IN : ANALOG GROUND : ANALOG SIGNAL IN : ALARM OUT : ANALOG SIGNAL OUT : ANALOG LOOP DETECTION SIGNAL IN : EXTERNAL SIGNAL IN/MODE CONTROL SET : ANALOG POSITIVE POWER SUPPLY : VBB VOLTAGE INFORMATION IN : BATTERY FEED CUT SIGNAL OUT : BUSY SIGNAL OUT : DC FEEDBACK CONTROL IN : DATA CLOCK IN
DGND1, DGND2 : DIGITAL GROUND DVDD1, DVDD2 EXD EXS FS HWR HWX NC PD RC1 - RC3 RST RTIN0, RTIN1 SUB SUS TYPE : DIGITAL POSITIVE POWER SUPPLY : EXPANSION PORT DATA : EXPANSION PORT SYNCHRONIZATION : FRAME SYNCHRONOUS CLOCK IN : RECEIVE HIGHWAY DATA IN : TRANSMIT HIGHWAY DATA OUT : NO CONNECTION : POWER DOWN CONTROL OUT : RELAY CONTROL OUT : RESET IN : RING TRIP SIGNAL IN : SUB GROUND : SUSPEND SIGNAL OUT : TYPE SIGNAL OUT
DCOUT1, DCOUT2 : DC FEEDBACK CONTROL OUT
2
PD9903
BLOCK DIAGRAM
RC1 RC2 RC3 DCIN1 ASCN AGDT
COMP. COMP. COMP.
SUS GDT
Waveform shaping guard processing SCN
BSY SUS
DCIN2 DCIN3 AIN DCOUT1 DCOUT2 Feed control HZ HB A/D + Channel filter
Linear to A or m
+
HWX
AOUT
D/A
+
Channel filter
A or to linear
HWR TYPE
ACOMIN ACOMOUT BBIN BCUT ALM PD
Reference voltage
FS Controller Ring-Trip Timing DCLK
RTIN0
RTIN1
EXD
EXS
SUB
AGND
DGND
AVDD
DVDD
RST
AUX/MODE
3
PD9903
CONTENTS
1. 2. 3.
PIN FUNCTIONS ...................................................................................................................... USE CAUTIONS ....................................................................................................................... ELECTRICAL SPECIFICATIONS ...........................................................................................
3.1 3.2 Discrete unit Ratings ...................................................................................................................... Combined Specifications with the PC7073 .............................................................................
5 7 8
8 17
4. 5. 6.
SYSTEM APPLICATION EXAMPLE USING THE PC7073 AND PD9903............. PACKAGE DRAWING ............................................................................................................. RECOMMENDED SOLDERING CONDITIONS ...................................................................
21 22 23
4
PD9903
1. PIN FUNCTIONS
Number 1-10 11 12 13 14 15 16 17 Pin Name NC AVDD DVDD1 DVDD2 AUX/MODE BSY SUS RST I/O - - - - I O O I Leave this pin open. +5 V power supply (analog) +5 V power supply (digital) +5 V power supply (digital) External signaling input BUSY LED driver output SUS LED driver output Pin for reset input and power-on reset H: HWX valid, L: HWX output's internal F/F clear status SIPO sync signal output for expansion port Note 1 SIPO serial data output for expansion port Note 1 Reception highway input [PCM data (8-bit) + CTL data (8-bit)] Clock input (2.048 MHz) 8-kHz sync input Rising : Rising : Falling: Falling: HWR PCM data input start HWX PCM data output start HWR CTL data input start HWX SCN data output start Function
18 19 20 21 22
EXS EXD HWR DCLK FS
O O I I I
23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
HWX TYPE RTIN1 RTIN0 RC3 RC2 RC1 BCUT ALM PD DGND2 DGND1 SUB AGND ACOMIN ACOMOUT AOUT AIN AGDT ASCN BBIN
O O I I O O O O O O - - - - I O O I I I I
Transmission highway output [PCM data (8-bit) + SCN data (8-bit)] HWX data enable Ring-Trip signal input 2 Ring-Trip signal input 1 Relay control for network testing Relay control for line testing Relay control for ringer transmit High and wet control output [to the PC7073's pin 22] [to the PC7073's pin 21] [to the PC7073's pin 20] [to the PC7073's pin 19]
Control output for ground-fault/power line contact protection mode [to the PC7073's pin 18] Power-down control output Digital ground 2 Note 2 Digital ground 1 Note 2 Substrate ground Note 2 Analog ground Note 2 Signal ground input Note 3 Signal ground output
Note 3
[to the PC7073's pin 17]
[to the PC7073's pin 11] [to the PC7073's pin 11] [to the PC7073's pin 10] [to the PC7073's pin 9] [to the PC7073's pin 8] [to the PC7073's pin 7] [to the PC7073's pin 6]
Analog signal output for receive side Analog signal input for transmit side Tip-Ring sum current detection input Tip-Ring difference current detection input VBB voltage information input
Notes 1. SIPO: Serial In Parallel Out 2. Short AGND, DGND1, DGND2, and SUB directly under the IC and connect them to an analog ground. 3. Short ACOMIN and ACOMOUT directly under the IC.
5
PD9903
Number 44 45 46 47 48 Pin Name DCOUT2 DCOUT1 DCIN1 DCIN2 DCIN3 I/O O O I I I DC feedback bias voltage output DC feedback control output DC feedback control input 1 DC feedback control input 2 DC feedback control input 3 Function [to the PC7073's pin 5] [to the PC7073's pin 4] [to the PC7073's pin 3] [to the PC7073's pin 2] [to the PC7073's pin 1]
6
PD9903
2. USE CAUTIONS
(1) Combined characteristics of the PC9903 and PD7073 * The PD9903 is designed to be used in combination with the PC7073. Therefore, the first half of the electrical specifications described below are ratings for the PD9903 as a discrete unit while the second half are combined ratings with the PC7073. * Subscriber circuit constants that are determined by factors such as termination impedance are configured to enable setting by external order parameters. Consequently, input of an order that is not suitable for the target impedance may result in failure to obtain the required characteristics. (2) Absolute maximum ratings Application of voltage or current in excess of the absolute maximum ratings may result in damage. Be especially cautious about surges, etc. (3) Load of by-pass capacitor Because the PC7073 and PD9903 use several internal high-frequency operational amplifiers, high power supply impedance can cause instability in these internal operational amplifiers (such as oscillation). To suppress such instability and eliminate power supply noise, connect by-pass capacitors (CACOM = approximate 0.1 F) having superior high frequency characteristics as close as possible to the PC7073's power supply pins (VBB and VCC) and the PD9903's power supply pins (AVDD and DVDD). (4) Addition of ACOM pin connection capacitor The voltage of the ACOM pin between the PC7073 and PD9903 is the reference voltage of the signal source between the PC9903 and PC7073. Superposing of noise on this pin may have adverse effects on transmission characteristics. Therefore, make the wires between the ACOM pins of the two LSIs as short as possible, and connect capacitors (CACOM = approximate 0.1 F) having superior high frequency characteristics as close as possible to the pins.
7
PD9903
3. 3.1 ELECTRICAL SPECIFICATIONS Discrete unit Ratings
Absolute maximum ratings (TA = +25 C)
Parameter Power supply voltage Analog input voltage Symbol VDD VAIN Conditions AVDD, DVDD1, DVDD2 AIN, ASCN, AGDT, ACOMIN, BBIN, DCIN1, DCIN2, and DCIN3 pins HWR, DCLK, FS, RST, AUX/MODE, RTIN0, and RTIN1 pins AOUT, DCOUT1, DCOUT2, and ACOMOUT pins HWX, BSY, SUS, RC1, RC2, RC3, EXS, EXD, BCUT, ALM, PD, and TYPE pins Rating -0.3 to +7.0 -0.3 to VDD + 0.3 Units V
Digital input voltage
VDIN
-0.3 to VDD + 0.3
Applied voltage to analog output pin Applied voltage to digital output pin Power dissipation Ambient operating temperature Storage temperature
VAOUT
-0.3 to VDD + 0.3
VDOUT
-0.3 to VDD + 0.3
PT TA Tstg
500 0 to +70 -65 to +150
mW C
Caution
If the absolute maximum rating for any of the above parameters is exceeded even momentarily, it may adversely affect the quality of this product. In other words, these absolute maximum ratings have been set to prevent physical damage to the product. Do not use the product in such a way as to exceed any of these ratings.
Recommended operating conditions (TA = 0 to 70 C, VDD = 5 V 5 %, GND = 0 V) (1) DC conditions
Parameter Ambient operating temperature Power supply voltage Analog input voltage Analog input driving resistance Analog output load resistance Analog output load capacitance Low level input voltage Symbol TA VDD VAI RLA1 ASCN, and AGDT pins ASCN, and AGDT pins Conditions MIN. 0 4.75 0 TYP. 25 5.0 MAX. 70 5.25 VDD 20 k Units C V
RLOAD CLOAD VIL1 VIL2
AOUT pin
100 100 pF V
FS, DCLK, HWR, and AUX/MODE pins RST, RTIN0, and RTIN1 pins FS, DCLK, HWR, and AUX/MODE pins RST, RTIN0, and RTIN1 pins
0 0 2.0 0.8 x VDD
0.8 0.2 x VDD VDD VDD
High level input voltage
VIH1 VIH2
8
PD9903
(2) AC conditions
Parameter Data clock frequency Data clock pulse width Frame sync clock frequency High level frame sync pulse width Low level frame sync pulse width Clock rise time Clock fall time Float in sync timing Symbol fDCLK tDCLK fS tWHS 50 ppm tCY x 8 tCY x 8 30 30 100 40 100 Conditions (= 1/tCY) 50 ppm 200 8.0 MIN. TYP. 2048 MAX. Units kHz ns kHz ns
tWLS tR tF tCSD1 tCSD2
ns ns ns ns ns ns
High level width of frame sync clock and data clock HWR set-up time HWR hold time Minimum width of reset pulse
tWHSC
tDSR tDHR PWRST
Note 1 Note 1 RST pin Note 2
65 120 10
ns ns
s
Notes 1. During timing measurement, use 5 ns as the rise time and fall time for the digital input wave form and clock signal. 2. The PD9903 is initialized when high level input is applied to the RST pin after applying low level input for several clock widths. (However, use of the RST pin is not guaranteed during low level input. Also, low level input alone does not initialize the PD9903.)
9
PD9903
DC Characteristics (TA = 0 to 70 C, VDD = 5 V 0.25 V, VDG = VAG = 0 V, fDCLK = 2048 kHz, all output pins are unloaded) (1) Current consumption
Parameter Circuit current Power-down circuit current Symbol IDD IDDPD Conditions During normal mode During power-down mode MIN. TYP. 15 46 MAX. 21 6 Units mA
(2) Digital interface
Parameter Digital input current Symbol IID Conditions 0 VDIN VDD for FS, DCLK, HWR, RTIN0, RTIN1, and RST pins VDIN = 0 V for AUX/MODE pin 0 VDIN VDD for HWX pin IOL = 3.4 mA for HWX pin IOL = 0.2 mA for RC1, RC2, RC3, BCUT, ALM, PD, EXS, and EXD pins IOL = 5 mA for BSY and SUS pins IOH = -0.6 mA for HWX and TYPE pins IOH = -2.0 mA for RC1, RC2, RC3, BCUT, ALM, PD, EXS, and EXD pins IOH = 0 mA for BSY and SUS pins f = 1 MHz, unmeasured pins returned to 0 V f = 1 MHz, unmeasured pins returned to 0 V 2.4 2.4 MIN. -10 TYP. MAX. +10 Units
A
Digital input pull-up current 3-state leakage current Low level output voltage
IIL IL VOL1 VOL2
-50 -10
-7
-0.5 +10 0.4 0.4 V
VOL3 High level output voltage VOH1 VOH2
1.1
VOH3 Output capacitance of digital output pin Input capacitance of digital input pin CID COD
VDD - 0.5 15 pF
10
(3) AIN pin
Parameter Input bias current Input resistance Input capacitance Symbol IB RIN CIN Input voltage: Conditions MIN. -10 1 10 TYP. MAX. +10 Units
A
M pF
(4) AOUT pin
Parameter Output offset voltage Symbol VOA Conditions HWR PCM data: zero PCM code, referenced to VACOM I/O current: -100 to +100 A MIN. -100 TYP. MAX. +100 Units mV
Output resistance
ROUT
50
10
PD9903
(5) ASCN and AGDT output pins
Parameter Input bias current Input resistance Symbol IB RIN Conditions Input voltage: 0 to VDD MIN. -10 1 TYP. MAX. +10 Units
A
M
(6) ACOMOUT pin
Parameter Output voltage Symbol VACOM Conditions I/O current: -0.1 to +0.1 mA MIN. 2380 TYP. MAX. 2420 Units mV
11
PD9903
AC characteristics (TA = 0 to 70 C, VDD = 5 V 0.25 V, VDG = VAG = 0, fDCLK = 2048 kHz)
Parameter Data enable delay time Symbol tDZX1 Conditions HWX and TYPE pins, when FS is delayed longer than DCLK HWX and TYPE pins, when DCLK is delayed longer than FS HWX pin HWX and TYPE pins EXS pin EXS pin EXD pin 30 MIN. TYP. MAX. 170 Units ns
tDZX2
170
ns
Data delay time Data hold time Delay time to EXS falling edge Delay time to EXS rising edge EXD data delay time Signaling bit set-up delay time Status bit set-up delay time LED driver set-up delay time Delay time to rising edge Delay time to falling edge Transmit delay time to external bit
tDDX tHZX tDEXSf tDEXSr tDEXD tDSIG
180 200 120 120 120 2
ns ns ns ns ns
s s s
ns ns
tDST tDLED tTHL tTLH tDAUX AUX pin BSY and SUS pins
2 2 100 100 125
s
12
PD9903
Timing charts (1) PCM data transmission timing (HWX pin) (a) DCLK is later than FS
tR FS tWHS tF
tCY tCSD2 tR tDCLK tF
DCLK
1
2
8
tDCLK tDZX2 Hi-Z HWX (PCM data) tDZX2 TYPE Hi-Z Hi-Level MSB 2nd 7th LSB tHZX Hi-Z tDDX tHZX
(b) FS is later than DCLK
FS
tCSD1
tWHSC
DCLK
1
2
8
Hi-Z HWX (PCM data)
tDZX1
MSB tDZX1
2nd
7th
LSB
TYPE
Hi-Z
Hi-Level
Hi-Z
13
PD9903
(2) SCN data transmission timing (HWX pin) (a) DCLK is later than FS
tF FS tWLS tR
tCY tCSD2 tR tDCLK tF
DCLK
1
2
8
tDCLK tDZX2 Hi-Z HWX (SCN data) tDZX2 TYPE Hi-Z Hi-Level MSB 2nd 7th tDDX
tHZX
LSB tHZX Hi-Z
(b) FS is later than DCLK
FS
tCSD1
tWHSC
DCLK
1
2
8
Hi-Z HWX (SCN data)
tDZX1
MSB tDZX1
2nd
7th
LSB
TYPE
Hi-Z
Hi-Level
Hi-Z
14
PD9903
(3) PCM data reception timing (HWR pin) (a) DCLK is later than FS
tR FS tCY tCSD2 1 tDSR tDCLK tDHR HWR (PCM data) Note MSB Note 2nd tR, tF 7th Note 8th Note tR tDCLK 2 tF 8 9 tWHS tF
DCLK
Note Don't care (b) FS is later than DCLK
FS
tCSD1 tWHSC DCLK 1 2 8 9
15
PD9903
(4) CTL data reception timing (HWR pin) (a) DCLK is later than FS
tF tWLS tR
FS tCY tCSD2 1 tDSR tDCLK tDHR HWR (CTL data) Note MSB Note 2nd tR, tF 7th Note 8th Note tR tDCLK 2 tF 8 9
DCLK
Note Don't care (b) FS is later than DCLK
FS
tCSD1 tWHSC DCLK 1 2 8
16
PD9903
3.2 Combined Specifications with the PC7073
DC characteristics
PC7073 (VBB = -42 to -58 V, VCC = 5 V 0.25 V, TA = 0 to 70 C, 18 IL ILMAX (mA)) PD9903 (TA = 0 to 70 C, VDD = 5 V 0.25 V, VDG = VAG = 0 V, fDCLK = 2048 kHz)
Parameter DC feed resistance Symbol RBF 200 feed 400 feed Minimum loop current ILMIN VBB = -51 V RL = 1900 Maximum current setting value ILMAX = 45 mA setting ILMAX = 35 mA setting Pin voltage during on-hook VTS Normal on-hook, between Tip and GND, VBB = -48 V Normal on-hook, between Ring and VBB, VBB = -48 V On-hook transmission, between Tip and GND, VBB = -48 V On-hook transmission, between Ring and VBB, VBB = -48 V VBB = -48 V ILMAX ILMAX = 76 mA setting 200 feed 400 feed 200 feed 400 feed Conditions MIN. 180 360 21.7 18.2 70 50 40 31 2.25 TYP. 200 400 22.2 18.8 76 55 45 35 2.55 MAX. 220 440 22.6 19.3 82 60 50 39 2.85 V mA mA Units
VRS
3.05
3.35
3.65
VTS
2.25
2.55
2.85
VRS
3.05
3.35
3.65
Voltage between lines during on-hook Supervisory control - VBB abnormal voltage
VTS
VBB - 7.0 VBB - 5.9 VBB - 5.0
V
VBBF
32
35
38
V
17
PD9903
ParameterNote Loop detection operating resistance (during normal transmission) Loop detection non-operating resistance (during normal transmission) Loop detection operating resistance (during on hook transmission) Loop detection non-operating resistance (during on hook transmission) Loop release non-operating resistance Loop release operating resistance Ground detection 1 (C/O) operating resistance Ground detection 1 (C/O) non-operating resistance Ground-fault/power line contact detection operating resistance Ground-fault/power line contact detection nonoperating resistance Ground-fault/power line contact release nonoperating resistance Ground-fault/power line contact release operating resistance RON7 RON6 Includes termination resistance Off-hook state Includes termination resistance ILMAX = 35 mA Includes termination resistance 1130 1.4 k ILMAX = 45/76 mA ILMAX = 35 mA ILMAX = 45/76 mA 870 RON4 RON3 Includes termination resistance RON2 Includes termination resistance Symbol RON1 Conditions Includes termination resistance 200 feed 400 feed 200 feed 400 feed 200 feed 400 feed 200 feed 400 feed 200 feed 400 feed 200 feed 400 feed Includes termination resistance 4540 4140 5.2 k MIN. TYP. MAX. 2500 2100 Units
3900 3500
1900 1500
2840 2440
2960 2560
20
340 480
10
Note
The above values are resistance-converted values.
18
PD9903
Transmission characteristics
PC7073 (VBB = -42 to -58 V, VCC = 5 V 0.25 V, TA = 0 to 70 C, 18 IL ILMAX (mA)) PD9903 (TA = 0 to 70 C, VDD = 5 V 0.25 V, VDG= VAG = 0 V, fDCLK = 2048 kHz)
Parameter Insertion loss Symbol IL Conditions A-D input signal 0 dBm0 1 kHz D-A input signal 0 dBm0 1 kHz Transfer loss frequency characteristics FRX A-D Reference input signal 1015 Hz 0 dBm0 60 200 300 400 to 3000 3200 3400 60 200 300 400 to 3000 3200 3400 Hz Hz Hz Hz Hz Hz Hz Hz Hz Hz Hz Hz MIN. -0.45 TYP. 0.0 MAX. +0.45 Units dB
-0.45
0.0
+0.45
24.0 0.6 -0.15 -0.15 -0.15 0.2 0.2 0.1 -0.15 -0.15 -0.15 0.2 -0.2 -0.5 -1.0
- 2.0 +0.21 +0.15 +0.65 0.8 4.0 1.0 +0.25 +0.15 +0.65 0.8 +0.2 +0.5 +1.0
dB
FRR
D-A Reference input signal 1015 Hz 0 dBm0
Gain tracking (tone method)
GTX
A-D Reference input signal -10 dBm0 f = 700 to 1100 Hz D-A Reference input signal -10 dBm0 f = 700 to 1100 Hz Input signal 0 dBm0 ZT = 600 + 2.16 F Input signal 0 dBm0 ZT = 600 + 2.16 F A-D Input signal f = 700 to 1100 Hz D-A Input signal f = 700 to 1100 Hz
+3 to -40 dBm0 -50 dBm0 -55 dBm0
dB
GTR
+3 to -40 dBm0 -50 dBm0 -55 dBm0 300 Hz 500 to 2000 Hz 2000 to 3400 Hz 300 Hz 500 to 2500 Hz 3400 Hz +3 to -30 dBm0 -40 dBm0 -45 dBm0 +3 to -30 dBm0 -40 dBm0 -45 dBm0
-0.2 -0.4 -0.8 16 20 16 18 22 18 36 30 25 36 30 25
+0.2 +0.4 +0.8 dB
Return loss
RL
Echo attenuation
TBRL
dB
Transmit channel total power distortion factor (tone method)
SDX
dB
SDR
19
PD9903
Parameter Absolute delay characteristics Absolute delay distortion frequency characteristics Symbol DA Conditions A-A Input signal 0 dBm0 MIN. TYP. MAX. 540 Units
s
DO
A-A
500 Hz 600 HZ 1000 to 2600 Hz 2800 Hz 44.0
1400 700 200 1400 dB
Intermodulation (2 Tone)
IMD
A-D Input signal f1, f2: 300 to 3400 Hz -4 to -21 dBm0 Measurement signal: 2 x f1 - f2 level (2 x f1 - f2) vs level (f1, f2) D-A Input signal f1, f2: 300 to 3400 Hz -4 to -21 dBm0 Measurement signal: 2 x f1 - f2 level (2 x f1 - f2) vs level (f1, f2)
44.0
Single frequency noise
NSF
D-A PAD level set at 0 dB Measurement signal up to f = 256 kHz A-D Difference from reference set value Setting value: +7.5 to +3.0 dB +3.0 to -3.5 dB D-A Difference from reference set value Setting value: 0.0 to -5.0 dB -5.0 to -8.5 dB -0.2 -0.1 -0.1 -0.2
-54
dBm0
Deviation in gain setting for transmission channel Deviation in gain setting for reception chanel
DGSX
dB +0.2 +0.1 +0.1 +0.2 -67 23 -76 14 42 48 43 20 dBm0p dBrnc0 dBm0p dBrnc0 dB
DGSR
Idle circuit noise
IDN24
2W-4W
A-law Psophometric weighted
-law
IDN42 4W-2W
C message weighted
A-law Psophometric weighted
-law
Line to ground balance attenuation AC induction noise resistance LCL
C message weighted f = 300 to 600 Hz f = 600 to 3400 Hz VIN = 6 Vrms VIN = 15 Vrms
RF = 50 Relative accuracy = 0.5 % IL = 0 mA IL = 20 mA
LFI
dBrnc
20
4. SYSTEM APPLICATION EXAMPLE USING THE PC7073 AND PD9903
VCC (+5 V) CVCC 1 F + (6 V) - R T1
27
T2
29
48 25
VCC RY1
RY2
RY3
AVDD DVDD2
DVDD1
SUS
T1 TS
R RFT Z1(0.5 %, 1 W) D2 Z2 D3 RFR
50 (0.5 %, 1 W) 50
Q1 RTE D1 D4 Q4
3.6 k (1 %, 1 W)
37 TB 38 24 40 42 32 44 45
RRE
3.6 k (1 %, 1 W)
RS
VBB TTXIN GND2 GND1 CPSR CDC OPIN+ OPIN-
AGND SUB DGND1 DGND2
TE TEF TS RS REF RE RB
PC7073 (BS-LSI)
TEST0 TEST1 TEST2 TEST3
T2
TX BIAS RX DCOUT3 DCOUT2 DCOUT1 DCIN1 DCIN2 BCUT ALM PD RC1 RC2 RC3 BBOUT ASCN AGDT
BSY
ACOM
23 47 31 15 46 36 33 34 - + + CDC -
0.68 F (10 V)
CVDD CCOM -+ RSUS RBSY 0.1 F 0.1 F 1 k 1 k (5 V) (6 V) 11 12 13 16 15 11 37 CAC 38 ACOMIN 350.68 F (50 V)40 ACOMOUT AIN 9- 39 10 HWX AOUT 48 1 CDIN3 TYPE 47 2 CDIN2 FS 46 3 CDIN1 45 4 DCLK DCOUT1 PC9903 44 5 DCOUT2 HWR 30 19 (HCS-LSI) BCUT EXD 31 18 ALM 32 17 EXS PD 29 20 RC1 RST 28 21 RC2 AUX/MODE 27 22 RC3 43 6 BBIN 42 7 ASCN 41 AGDT 8 + CGDT 36 35 34 33 26 25 - 0.68 F (10 V)
VDD (+5 V) 2 k RPULL
CVBB -
CPSR 0.68 F (50 V)
VBB (-48 V)
0.1 F + (100 V)
G
Ring-Trip detector
RTIN0 RTIN1
+
23 24 22 21 20 19 18 17 14
HWX TYPE FS DCLK HWR EXD EXS RST AUX/MODE
PD9903
CR
21
PD9903
5. PACKAGE DRAWING
48 PIN PLASTIC SHRINK SOP (375 mil)
48
25
detail of lead end
1
A
24 H
G
3+7 -3
I
J
F
C D MM
N B
E
K
L
P48GT-65-375B-1 NOTE Each lead centerline is located within 0.10 mm (0.004 inch) of its true position (T.P.) at maximum material condition. ITEM A B C D E F G H I J K L M N MILLIMETERS 16.21 MAX. 0.63 MAX. 0.65 (T.P.) 0.30 0.10 0.125 0.075 2.0 MAX. 1.7 0.1 10.0 0.3 8.0 0.2 1.0 0.2 0.15+0.10 -0.05 0.5 0.2 0.10 0.10 INCHES 0.639 MAX. 0.025 MAX. 0.026 (T.P.) 0.012+0.004 -0.005 0.005 0.003 0.079 MAX. 0.067 0.004 0.394 +0.012 -0.013 0.315 0.008 0.039+0.009 -0.008 0.006+0.004 -0.002 0.020+0.008 -0.009 0.004 0.004
22
PD9903
6. RECOMMENDED SOLDERING CONDITIONS
This product should be soldered and mounted under the conditions recommended below. For details of recommended soldering conditions, refer to the information document Semiconductor Device Mounting Technology Manual (C10535E). For soldering methods and conditions other than those recommended, please contact your NEC sales representative. SURFACE MOUNT TYPE
PC9903GT: 48-pin plastic shrink SOP (375 mil)
Recommended Condition Symbol IR35-00-1
Soldering Method Infrared ray reflow
Soldering Conditions Package peak temperature: 235 C Reflow time: 30 sec. max. (210 C or above) Number of times: 1 time Pin temperature: 300 C max. Heat time: 3 sec. max. (per each side of the device)
Partial heating method
-
23
PD9903
[MEMO]
24
PD9903
[MEMO]
25
PD9903
[MEMO]
26
PD9903
NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it.
2 HANDLING OF UNUSED INPUT PINS FOR CMOS
Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices.
3 STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function.
27
PD9903
[MEMO]
The application circuits and their parameters are for reference only and are not intended for use in actual design-ins.
No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product.
M4 96.5


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